Dual Three-Phase Sparse Inverter: Topology Analysis, PWM Scheme, and Common Mode Voltage Elimination

dc.authorscopusid 57887557700
dc.authorscopusid 6506152637
dc.authorscopusid 59157692800
dc.authorscopusid 7005402806
dc.contributor.author Aghaei, Hadi
dc.contributor.author Babaei, Ebrahim
dc.contributor.author Sharifian, Mohammad Bagher Bannae
dc.contributor.author Iqbal, Atif
dc.date.accessioned 2025-09-15T18:35:28Z
dc.date.available 2025-09-15T18:35:28Z
dc.date.issued 2025
dc.department Okan University en_US
dc.department-temp [Aghaei] Hadi, Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran; [Babaei] Ebrahim, Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran, Faculty of Engineering and Natural Sciences, Istanbul Okan University, Tuzla, Turkey, Energy Systems Research Center, Khazar University, Baku, Azerbaijan; [Sharifian] Mohammad Bagher Bannae, Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran; [Iqbal] Atif, Department of Electrical Engineering, College of Engineering, Qatar University, Doha, Qatar en_US
dc.description.abstract Dual three-phase drives offer significant advantages for medium and high-power applications, including reduced current ratings for power switches, lower torque ripple, and enhanced fault tolerance compared to conventional three-phase drives. However, traditional three-level inverters used to drive these motors often escalate system costs due to their large number of power switches. This paper introduces a dual three-phase sparse inverter designed to address these limitations. The proposed inverter utilizes only 16 power switches, a substantial reduction compared to conventional three-level inverters. This paper also propose a carrier-based Pulse Width Modulation (PWM) scheme that uniquely imposes no computational burden on the microcontroller. This PWM strategy incorporates a 180-degree phase shift between carriers of two three-phase systems, effectively eliminating common-mode voltage (CMV) in the topology. A comprehensive comparative study was conducted, assessing the proposed inverter against both two-level and conventional three-level inverters based on Total Harmonic Distortion (THD) and efficiency. To validate its performance, experimental results are provided for the proposed dual three-phase inverter driving a 746 W induction motor using a constant volt/Hz open-loop control method. © 2025 Elsevier B.V., All rights reserved. en_US
dc.identifier.doi 10.1109/OJIES.2025.3599409
dc.identifier.issn 2644-1284
dc.identifier.scopus 2-s2.0-105013282979
dc.identifier.scopusquality Q1
dc.identifier.uri https://doi.org/10.1109/OJIES.2025.3599409
dc.identifier.uri https://hdl.handle.net/20.500.14517/8355
dc.identifier.wosquality N/A
dc.language.iso en en_US
dc.publisher Institute of Electrical and Electronics Engineers Inc. en_US
dc.relation.ispartof IEEE Open Journal of the Industrial Electronics Society en_US
dc.relation.publicationcategory Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı en_US
dc.rights info:eu-repo/semantics/closedAccess en_US
dc.subject Common Mode Voltage (CMV) Elimination en_US
dc.subject Discontinues Pulse Width Modulation (DPWM) en_US
dc.subject Dual Three-Phase Motor en_US
dc.subject Sparse Inverter en_US
dc.subject Controllers en_US
dc.subject Electric Inverters en_US
dc.subject Electric Machine Control en_US
dc.subject Fault Tolerance en_US
dc.subject Induction Motors en_US
dc.subject Industrial Electronics en_US
dc.subject Open Loop Control en_US
dc.subject Topology en_US
dc.subject Voltage Control en_US
dc.subject Common Mode Voltage Elimination en_US
dc.subject Discontinue Pulse Width Modulation en_US
dc.subject Dual Three-Phase en_US
dc.subject Dual Three-Phase Motors en_US
dc.subject Inverter Topologies en_US
dc.subject Modulation Schemes en_US
dc.subject Power-Switches en_US
dc.subject Pulsewidth Modulations (PWM) en_US
dc.subject Sparse Inverter en_US
dc.subject Three-Level Inverters en_US
dc.subject Pulse Width Modulation en_US
dc.title Dual Three-Phase Sparse Inverter: Topology Analysis, PWM Scheme, and Common Mode Voltage Elimination en_US
dc.type Article en_US
dspace.entity.type Publication
gdc.coar.access metadata only access
gdc.coar.type text::journal::journal article

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